1. Field of the Invention
The present invention relates to Field-Effect Transistors (FETs), and, in particular, to a programmable Complementary Metal-Oxide-Semiconductor (CMOS) temperature compensation circuit that is used for adjusting the gate voltage of MOSFETs in order to compensate for variations in temperature.
2. Description of the Related Art
Temperature variations affect the performance of FETs. Temperature variations may be in the form of ambient temperature variations, i.e., variations in the temperature of the air surrounding integrated circuits, and/or junction temperature variations, i.e., variations in the temperature of the silicon in an integrated circuit. Ambient temperature variations can cause junction temperature variations, and vice versa.
FET performance is affected because temperature variations tend to cause the transconductance g.sub.m of the transistors to vary. The amount of current that is conducted by a transistor's current conducting channel, i.e., the current conducted between the drain and source (I.sub.DS for n-channel and I.sub.SD for p-channel), is determined in part by g.sub.m. In the case of a MOSFET, when temperature increases, transconductance g.sub.m decreases which causes currents I.sub.DS and I.sub.SD to decrease. On the other hand, when temperature decreases, transconductance g.sub.m increases which causes I.sub.DS and I.sub.SD to increase. Thus, it may be said that the current conducted by the channel of a MOSFET has a negative temperature coefficient. Furthermore, I.sub.DS, I.sub.SD, and g.sub.m vary linearly with temperature variations.
Logic gates are typically constructed from several transistors. The speed of a logic gate is determined in part by the I.sub.DS of the individual transistors, which results in gate speed being proportional to g.sub.m. If the g.sub.m of each transistor in a logic gate varies with temperature, then the I.sub.DS of each transistor also varies which causes the speed of the logic gate to vary with temperature. For example, when temperature increases, gate speed decreases, and when temperature decreases, gate speed increases.
Variations in gate speed due to temperature variations is an undesirable characteristic because such variations can adversely affect the synchronized timing operations of a digital system. Digital systems can be designed to operate more efficiently if the designer can be assured that gate speed will remain constant. Gate speed can be kept relatively constant if temperature is kept constant. However, because digital systems must operate in a variety of environments, ambient and junction temperature cannot always be controlled.
Temperature variations also affect the performance of bipolar transistors, and thus, the speed of logic gates constructed from bipolar transistors tends to vary with temperature. FIG. 1 shows a bipolar transistor circuit 10 having prior art circuitry 12 that is used to offset the effects of temperature variations.
The circuitry 12 suffers from a number of disadvantages due to its bipolar construction. First, the emitters of transistors Q23 and Q24A cannot be connected directly to voltage supply V.sub.CC because the emitters must be clamped to have a potential equal to three diode voltages. Because it is common for voltage supply V.sub.CC to vary, the emitters of transistors Q23 and Q24A must be connected to resistor R34 to absorb any voltage supply V.sub.CC variations.
Second, when voltage supply V.sub.CC varies, the current through resistor R34 also varies. In order to maintain constant currents through transistors Q23 and Q24A, transistor Q25 is needed to absorb any excess current.
Third, transistor Q22 is needed in order to keep the currents conducted by transistors Q23 and Q24A equal. Transistor Q22, however, has a tendency to cause oscillations in the circuit 12.
Lastly, bipolar transistor circuitry has high power dissipation and high cost large scale integration due to low gate density.
Thus, there is a need for a CMOS circuit that can be used to maintain relatively constant gate speed during variations in temperature.